As the semiconductor industry continues to shrink feature sizes, control of critical dimension (CD) becomes increasingly important and the constraints on across-wafer CD variation become substantially more stringent. For semiconductor plasma etching processes, often multiple plasma etching chambers are used to reach the manufacturing throughput goal. Chamber to chamber matching of the etching process and maintaining consistent chamber etching performance are critical in obtaining good CD control to meet the stringent requirement.
Etch profile critical dimensions, such as line width, are affected by many factors, but most typically by the photolithography and etching processes. During an etching process, substrate temperature strongly affects the etching rate and etched profile. To achieve tight control of CDs, substrate temperature must be carefully monitored and controlled.
Traditionally, substrate temperature in an etching process chamber is not monitored in-situ. Substrate temperature is sometimes measured during hardware development or during hardware maintenance to calibrate the process temperature before beginning a new process. Typically, substrate temperature is indirectly controlled by controlling the ESC temperature. However, substrate temperature can be as much as 60° C. hotter than the surface of the ESC during the etching process due to the relatively low heat transfer coefficient for heat transfer between the wafer and the surface of the ESC compared to the heat transfer coefficient of the ESC. Therefore, the measurement of the ESC temperature makes precise control of substrate temperature impractical.
As mentioned earlier, substrate temperature is sometimes measured during hardware development or during hardware maintenance to adjust the process settings. However, during plasma etching, the electrostatic chuck (ESC), used to support substrates, can experience changes in surface roughness due to process chemistries used in the etch processes. The change in surface roughness can thus cause the contact between ESC and the wafer to change, which results in the substrate (or wafer) temperature drifting over time, even when the equipment and process setting remain unchanged. As a further problem, such temperature drifts contribute to chamber-to-chamber variation and increases the difficulty in obtaining consistent etch results from multiple chambers.
In view of the foregoing, there is a need for a mechanism of automated in-situ measurement of substrate temperature and automated adjustment of chamber process parameters to compensate for changes or differences in the substrate temperature during manufacturing. The in-situ temperature measuring mechanism and automated process parameter adjustment would allow tight CD control to meet the stringent CD requirement for advanced semiconductor manufacturing.